1. Field of the Invention
The present invention relates to an operational amplifier and, more particularly, to an operational amplifier for amplifying a signal.
2. Related Background Art
FIG. 6 is a circuit diagram showing an arrangement of a conventional operational amplifier. The operational amplifier shown in FIG. 6 is a so-called folded-cascade-type operational amplifier. Referring to FIG. 6, a block 10 represents an input differential stage; a block 11, a voltage amplification stage; and a block 12, an output buffer stage. The operational amplifier comprises nMOS transistors M1, M2, and M5 to M8, pMOS transistors M3, M4, M9, and M10, bias setting constant current sources I1 to I5 for transistors, a phase compensation capacitor C1, a load capacitor C2 connected to an output terminal 4, a voltage source V1 for applying a gate bias voltage to the common gate transistors M5 and M6, a power supply terminal 1, a positive input terminal 2, a negative input terminal 3, and an output terminal 4. When the output terminal 4 and negative input terminal 3 are short-circuited, this operational amplifier operates as a voltage follower.
To amplify outputs from various signal sources represented by a sensor such as a CCD using such an operational amplifier, low random noise, high speed, high stability, low power consumption, high accuracy (high open loop gain), and the like are required for the operational amplifier.
It is important to suppress random noise which directly influences the S/N ratio or dynamic range of a signal. When sampling of a sensor output changing stepwise is required to digitally process the signal output from a CCD sensor for handling a highly accurate video signal, the step response output from the operational amplifier must quickly change in response to the input and immediately settle to the final value. In this case, high speed and high stability are important. When the operational amplifier is used as a voltage follower, as shown in FIG. 6, the open loop gain of the operational amplifier must be relatively high to obtain a highly accurate output because the accuracy of the output voltage is proportional to the open loop gain of the operational amplifier. Many products for processing video data are driven by batteries, and the operable time of the products must be long. In this case, it is important to reduce power consumption.
However, the above-described performances required for the operational amplifier are traded off each other, as will be described below.
Random noise generated in the operational amplifier shown in FIG. 6 includes flickering noise representing so-called 1/f (f is the frequency) characteristics and thermal noise due to the channel resistance or the like of a MOS transistor, and the noise is mainly generated by the input MOS transistors M1 and M2. The thermal noise whose magnitude has no dependence on the frequency especially has a large influence in a wide-band amplifier. When the noise is figured out as a noise voltage source at the gate input, a magnitude V of thermal noise is given by ##EQU1## where .DELTA.f is the bandwidth, and g.sub.m is the transconductance.
As is apparent from equation (1), the thermal noise is inversely proportional to the transconductance g.sub.m of the transistors.
The value of the open loop voltage gain of the operational amplifier shown in FIG. 6 in a low-frequency region is represented by g.sub.mi R.sub.L, where g.sub.mi is the transconductance of the input MOS transistors M1 and M2, and R.sub.L is the impedance at a point A in FIG. 6. FIG. 7 shows the frequency characteristics of the open loop voltage gain of the operational amplifier. Referring to FIG. 7, .omega..sub.P1 is the first pole, and .omega..sub.P2 is the second pole. Normally, the first pole .omega..sub.P1 is determined by the capacitance of the phase compensation capacitor C1 and the impedance R.sub.L at the point A in FIG. 6, and the second pole .omega..sub.P2 is determined by the synthesized output impedance of the output MOS transistors M8 and M10 and the capacitance of the load capacitor C2.
The settling time (time after a step input is supplied to the operational amplifier and until the output from the operational amplifier changes in accordance with the input and reaches a value corresponding to .+-.0.1% or .+-.0.01% of the final value) representing the stability of the amplifier depends on the magnitude of the open loop gain at the frequency .omega..sub.P2. When the magnitude is 0 dB or less, and as it is becomes smaller, ringing in the step response becomes small, so the settling time shortens. The magnitude of the load capacitor C2 cannot be arbitrarily decreased in many cases. To move the frequency .omega..sub.P2 to a high frequency side, the transconductances g.sub.m of the output transistors M8 and M9 must be increased. For this purpose, the ratio (W/L) of a gate width W to a gate length L of the output transistors M8 and M9 is made high and the drain current is made to increase. However, when the ratio W/L becomes higher, the occupation area of the semiconductor chip increases, resulting in an increase in cost. Additionally, an increase in drain current results in an increase in current consumption. Hence, the frequency .omega..sub.P2 cannot be largely moved to the high-frequency side.
To increase the stability of the amplifier, the frequency .omega..sub.P1 is moved to the low-frequency side, or the open loop gain itself is decreased. However, to move the frequency .omega..sub.P1 to the low-frequency side, the capacitance of the phase compensation capacitor must be increased, resulting in a decrease in slewing rate representing the high-speed operability of the amplifier.
As the final technique, the open loop gain is decreased. To do this, the transconductances g.sub.m of the input transistors must be made small. However, the transconductances g.sub.m of the input transistors are directly associated with random noise, as described above, and therefore, cannot be decreased.